Image credit: Flickr

Energy-Efficient 8-Point DCT Approximations: Theory and Hardware Architectures

Image credit: Flickr

Energy-Efficient 8-Point DCT Approximations: Theory and Hardware Architectures

Abstract

Due to its remarkable energy compaction properties, the discrete cosine transform (DCT) is employed in a multitude of compression standards, such as JPEG and H.265/HEVC. Several low-complexity integer approximations for the DCT have been proposed for both 1D and 2D signal analyses. The increasing demand for low-complexity, energy-efficient methods requires algorithms with even lower computational costs. In this paper, new 8-point DCT approximations with very low arithmetic complexity are presented. The new transforms are proposed based on pruning state-of-the-art DCT approximations. The proposed algorithms were assessed in terms of arithmetic complexity, energy retention capability, and image compression performance. In addition, a metric combining performance and computational complexity measures was proposed. Results showed good performance and extremely low computational complexity. Introduced algorithms were mapped into systolic-array digital architectures and physically realized as digital prototype circuits using FPGA technology and mapped to 45 nm CMOS technology. All hardware-related metrics showed low resource consumption of the proposed pruned approximate transforms. The best proposed transform according to the introduced metric presents a reduction in power consumption of 21–25%.

Publication
In Circuits, Systems, and Signal Processing, Sringer.
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